Help please with glitch in an half bridge inverter

[obiwan]

Dear friends, could you please help me solve this glitch in my inverter ?
Here is the output circuit and oscillograms.
Attached pictures:

- A and B signals at de gates
- C output signal
- Schematic diagram

The transformer calculation done with Dimitri's program, output voltage and current are OK as calculated.
Al signals shown with output loaded with 12V @ 3A output rating.
Thank you !
Roberto

 

[fourtytwo]

Hi, I think you made mistake with point C, it seems to be capacitive centre tap, not output ?
In any case why does your power supply not have inductor on output ?

 

[obiwan]

fourtytwo the output is taken from the mid point in which both MOSFETs connect, and YES, a midpoint between these 2 capacitors where you measure half the +B voltage . This is a very well known half bridge design.
Anyway I used snubber networks to reduce this glitch and it worked fine. I added some ceramic 470 pf caps that contributed to obtain a very good signal.
Now the only problem that I have is that the ouput signal is good if I have a minimum power consumption of 1 A. Below this, the MOSFETs work loosely when each of them disconnect, and the signal is bad.
I really didn't imagen that placing capacitors over the output rectifier diodes could be a good idea, but this worked reducing ringing to much.
The new drawing includes the output inductor that was missing in the previous schematic circuit.
MOSFETs are cool but the snubbers dissipate some heat that needs 3W resistors.
I would still like some advise to improve this circuit.
Thank you !

 

[obiwan]

BTW I would like to attach some typical well known topologies of SMPS circuits. The picture shows that my circuit is one of these topologies, half bridge.
Regards
Roberto

 

[fourtytwo]

Its hard to help with so little information! your gate diodes seem the wrong way around as its normally required to slow down turn-on and speed up turn-off. You say nothing of your transformer construction, I assume given the amount of energy you are dissipating in snubbers it is not good and has very high leakage inductance. You don't mention the inductor value nor the normal load range the psu is designed for, I surmise the input voltage is 110VAC rectified ? I think most people could figure its a half-bridge

 

[obiwan]

In the first place, this power supply is needed for a special industrial control application ( a train wagon ) in which the available power source is a DC voltage between 80 V to 150 V. The output of the device should be about 12 VDC to power relays and logic.

We are not working on the closed loop yet. The circuit shown is just a very well known PWM generator in order to test all the power and driver circuits, and magnetics. We will close the regulation loop once the power section is finished. The circuit is driven with the typical TL494 scheme, working at 60 KHz. The PWM signal is applied to the shown transistor pairs that drive the gate transformers. The gate transformers are toroids, 4300 mu, with 11 turns primary and 8 turns secondary. Two transformers were used (also in the low side MOSFET) to preserve symmetry o both HI side and LO side power MOSFETS, although the transistor BC337/BC327 pair should be enough for the low side MOSFET. We tested this, and best results were obtained using 2 transformers. As shown in pictures before, the obtained gate signal seems to be good enough, with a 12 V amplitude square wave.

About the switching transformer: attached is a picture of the Dimitri's Excellent program. The transformer has been winded placing the primary in the middle of the secondary winding, winded in two splitted parts. Several transformers have been tested with different known winding techniques, and the result was always the same. E and ER magnetic cores were tested. More or less the same results have been obtained.

About the output filter inductance: we used this link that has probed to be reliable information: http://schmidt-walter-schaltnetzteile.de/smps_e/hgw_smps_e.html
As shown in the calculation output, an E20 core was used with 19 turns of 1,5 mm wire.

The gate diodes and the schematic for the triggering circuit was taken from the following sources: Keith Billings - Switchmode Power Supply Handbook 1St Ed , Marty Brown - Power Supply Cookbook, Half-Bridge Drivers A Transformer or an All-Silicon Drive? (Motorola Slide show)

>>> One question here is if the picture of the glitch shown in previous original post picture is normal without the use of snubbers <<<

Placing the snubber network on each MOSFET solved the problem, but there is a certain amount of dissipated energy there.
Please ask me about any other detail you may need and I will provide the information.

 

[wally7856]

C19 has to work very hard with no resistor. Tune this with a resistor to reduce the primary ringing.

The transformer primary should have a series capacitor to prevent flux walking and transformer saturation.

 

[obiwan]

C19 has to work very hard with no resistor. Tune this with a resistor to reduce the primary ringing.

The transformer primary should have a series capacitor to prevent flux walking and transformer saturation.

wally7856 please let me get this clear: an extra capacitor is needed in series with the primary, no matter that it is actually connected to the midpoint of 2 capacitors C15 and C16 ? What could be a possible value for this new capacitor ? I I do this, could I remove the snubber networks ?

Here is a corrected version of the schematic, it had some part numbering error.

 

[wally7856]

Yes you need a series capacitor in the transformer primary. C15 and C16 are not perfect parts. The voltage will not be split perfectly and with age will only get worse. If you have power to spare you could put resistors across C15 and C16 ( you should have them anyway just for safety discharge). For discharge, size them so a 1/2 watt resistor will dissipate 1/4 watt with highest voltage (my quick rule of thumb). Trying to use higher wattage resistors to keep the voltage balanced may work but i could not be sure on how much wattage this would take. I would start with maybe 2 watt resistors run at 1 watt dissipation. The only problem with this method is it would take a long time to test for long term operation and if it is enough power to balance a production run if that's what you want to do.

The series capacitor is probably around 4uF, high current film type. of a voltage rating at least as high as your highest input voltage.

Pressman has a write up on how to calculate it, do you have his book?

The proper RC of capacitor C17 on transformer secondary will reflect to the primary and help reduce your voltage spikes

36W half bridge
12vdc at 3A
7 x 2.5 uS = primary waveform = 17.5 uS = 57khz
power source is a DC voltage between 80 V to 150 V
primary voltage = 80vdc / 2 = 40vdc
A tolerable droop in the flat-topped primary voltage pulse would
be a minimum of 5% and no more than 10% or about 4 V.


Cb capacitor blocking = (Ipft x 0.8T/2) / dV droop voltage


Ipft peak flat topped current = 3.13Po/Vdc Min
3.13 x 36W / 40vdc = 2.817A

Cb capacitor blocking = (Ipft x 0.8T/2) / dV droop voltage
(2.82A x (0.8T x .0000175 sec) / 2) / 4 dV droop voltage
(2.82A x (0.000014) / 2) / 4 dV droop voltage
(2.82A x 0.000007) / 4 dV droop voltage
0.00001974 / 4 dV droop voltage = 4.94 uF

 

[obiwan]

Thank you wally7856. I am not an SMPS expert as you can see. My skills are in analog and digital design and microprocessors. I am just getting started with this, and this project is not for a large production. This PS is needed for an air conditioning automation contract, and the input voltage is not standard. We should build some 10 or 20 of these.

I will make the changes and place the primary series capacitor and will add series resistance to de secondary capacitor too.

My feeling is that I shouldn't place any capacitors in parallel with the output rectifiers, but my oscilloscope is showing that they are reducing ringing.

Also, the waveforms are fairly good only if I load the output with a minimum 1A. Below that, the MOSFET's "float" when they turn off and the dead time is practically gone.

Once placing the primary series capacitor you suggested, I will try to remove the snubbers from the MOSFET's, another feeling that this snubbers are not necessary.
I would like to know your opinion on what elements would you remove (if any) and why...
I will try to get the Pressman book. The signal picture you attached is what I should get, and if you take a look to my oscillograms, I think that I am close, but I had that glitch, so I started to kill it by adding snubbers.
Attached pictures are the before (with glitch and no snubber) and after (with all the snubbers and caps)

Thanks again for the excellent level of your reply.

 

[obiwan]

Pressman has a write up on how to calculate it, do you have his book?

BTW wally7856, I have an old version of the book I guess. I've got the one you suggested. Now I see, they are different books.
The original Billings' book is very good but this last one is really excellent. Many details that the old version skipped.
I will test the new capacitor on monday and be back.

Thanks for this information !

 

[wally7856]

Make the changes we talked about and then take more waveform's to see were we are at.

 

[obiwan]

Sure will wally7856, as soon as I get in the lab tomorrow. I will report the new tests.
Thank you !

 

[wally7856]

obiwan, You also need an output inductor. I just went through the reasons and calculations in this thread.

http://www.diysmps.com/forums/showthread.php?757-Inductive-Spike-for-Push-Pull-car-audio-supply

Are you using ceramic output capacitors? Let me know what you are using, part numbers or ESR would help.

 

[wally7856]

OK, i see in the last rev you added an inductor. Now that i looked again i see this is an unregulated SMPS so worrying about ESR and output ripple is mute. Make sure you have enough ripple current rating and add caps until you get the P-P ripple voltage you want, but relays are not very fussy.

 

[obiwan]

Now that i looked again i see this is an unregulated SMPS

Well wally7856, it ends being a regulated SMPS, but I decided to start by generating the gate signals, establish a dead time based upon transformer calculation, and fight until I could get the energy applied to a fixed resistive load. I made this because I have the skills of any electronic engineer with 35 years experience >>>except<<< for SMPS . So I divided my problem in smaller ones. With your valuable help that I really appreciate, I will try to close the loop.

This circuit involves an output bridge rectifier, a filter inductor that was calculated with the same program that calculated the transformer. This last piece is working really cold same as the MOSFET's. In the next 10 minutes i will be testing the changes you sugested and post the results. As I don't have low ESR capacitors handy, I used many regular electrolytic capacitores in parallel. I will get them as soon as I can know the value needed.

All capacitors placed in the circuit are ceramic disc, most of them 1KV rating, except for the driver electrolytic capacitors. The large capacitors for placing in series with the primary are high voltage polyester.

I'll be back soon with the results

 

[obiwan]

OK wally7856, I'm back with my results.
These are 14 pictures of oscillograms obtained while I made changes over the last corrected version of the schematic.
The new version of the schematic is also attached in this post.
Starting with this last circuit, I first added a 4.4uF polyester capacitor as you suggested. The capacitor should had been 4.94 uF, but I tried to make it fast with the components I had in stock.
Then I worked on the transformer secondary adding resistance to the existing 470pF as you suggested.
In the middle of the tests I found secondary results, and made some other removals and changes.
Because of my error, I made the tests with 2A load instead of 4A. I am sorry for that and for sure I will have to rework all the values with the correct load. I don't have all the component values but I will get them for wednesday.
So these tests have been done by combining values in series and parallel to get best approximations.

To follow the changes I suggest to look at the previous version of the schematic so we can follow parts numbering.
All oscillograms measured across transformer primary terminals

Oscillogram 1: added 4.4uF polyester capacitor in series with transformer primary
Oscillogram 2: tested 5.9uF value instead of 4.4uF
Oscillogram 3: tested 2.2uF value instead of 4.4uF , I finally left 4.4uF
Oscillogram 4: added 1K resistor to C17 - 470pF ceramic disc capacitor, this capacitor has very slight effect on the top ringing of the waveform
Oscillogram 5: completely removed C17 - 470pF ceramic disc capacitor, this capacitor has very slight effect on the top ringing of the waveform
Oscillogram 6: ringing detail C17 removed
Oscillogram 7: replaced C17 470 pF by 10nF, has great impact controlling ringing
Oscillogram 8: testing 2.5 Ohm in series with 10nF C17, top ringing very much reduced, I take this values as finalOscillogram 9: Completely removed MOSFET's snubbers R19, R20, R21, R22, C15 and C16 - brutal ringing

Please switch to last corrected version of the schematic ( attached )

Oscillogram 10: installed just one snubber network C13 10nF + R23 112 Ohms
Oscillogram 11 and 12: adjusted value of C13 now 5nF + R23 112 Ohms
Oscillogram 13 and 14: increased load from 2A to 4A, new glitch !

This is the result of my tests, I think I have to rework all values with 4A load.
Now we can talk some issues if you agree.

Kind regards

 

[wally7856]

This is the best ap note for snubbers.

https://www.maximintegrated.com/en/app-notes/index.mvp/id/3835

The increase of the leading edge spike with current is because of transformer leakage inductance.

You can put an RC across any or all of the following.
The secondary.
The primary.
Across each mosfet.

It would be smart to start with low leakage inductance. Exactly how did you wind your transformer.

What core.
What ferrite.
What wire.
How many turns.
What windings went were.
Margins.
Layers of tape between windings.

Adding the output inductor will probably reduce the spike also at full current.

 

[obiwan]

Exactly how did you wind your transformer.
What core.
What ferrite.
What wire.
How many turns.
What windings went were.
Margins.
Layers of tape between windings.

wally7856 I will report this at the end of the day because we are going to build a brand new transformer and take pictures of the making, so you can correct the bad steps ( I guess there will be several):"::

 

[obiwan]

We are winding the transformer now.

The core is an EPCOS (Siemens / TDK) ER 35/22/11 - permeability u = 1610 - material type N27

http://en.tdk.eu/blob/519704/download/2/ferrites-and-accessories-data-book-130501.pdf

Calculation using Dimitri's ExcellentIT - SMPS transformer calculation tool (Version 7100)

Primary: 23 turns - 0.3mm * 5 wires

Secondary #1: 10 turns // 0.3mm * 8 wires
Secondary #2: 5 turns // 0.3mm * 1 wire
Secondary #3: 5 turns // 0.3mm * 2 wires
Secondary #4: 12 turns // 0.3mm * 1 wire

Output filter inductors calculation:

For secondary #1: 58.3 uH
For secondary #2: 233.1 uH
For secondary #3: 116.6 uH
For secondary #4: 2797.4 uH

Attached is the Dimitri's output screen.

(To be continued in next post)